The present invention relates to a high resolution, high order delta signal digital-to-analog converter. Specifically, a feed forward DAC is disclosed for converting a digital signal to a low noise analog signal which minimizes the effects of clock jitter on the noise floor of the analog signal.
Radio frequency communications systems such as cellular telephone systems employ significant amounts of digital processing to both transmit and receive signals. On the transmit side, information is processed on a digital level and only at the final radio frequency carrier level is the signal converted to an analog signal. The analog signal is then mixed with an RF carrier of the cellular telephone system for transmission.
The digital data processed below the radio frequency signal band is upwards to 16 bits wide. The high resolution digital signal may then be converted to a lower order bit signal using a digital signal modulator. However, it is desirable to maintain the same signal-to-noise ratio so that the reconverted signal on the receive side maintains the same resolution as the original digital signal.
The process of converting the digital signal to an analog signal introduces noise in the signal thereby limiting the resolution of the converted signal. The noise is strongly affected by the amount of phase jitter in the data being converted by the digital analog converter. Phase jitter on the incoming digital data to the DAC is the result of the phase jitter on the system clock which affects the digital data bit transitions producing the phase noise modulation. The phase noise modulation contributes to the noise floor of the resulting analog signal limiting the ability to obtain a high resolution of the analog signal level.
The present invention is directed to a DAC which maintains the high resolution of an incoming digital signal which is converted into an analog signal.
In carrying out the invention, a non return to zero (NRZ) SIN digital-to-analog converter (DAC) is provided for converting a digital input signal to an analog signal. The NRZ SIN digital-to-analog converter provides an sine wave output in response to a first state of a digital signal proportional to 1+COS 2xcfx80f(t), and in response to a second state of the digital signal, a sine wave signal proportional to xe2x88x921xe2x88x92COS 2xcfx80f(t).
A second SIN digital to analog converter receives a delayed version of the digital signal. The output of the second SIN digital converter is phase shifted with respect to the output of the first sign digital converter, and the respective output signals are combined to produce a non-return to zero (NRZ) output voltage. The NRZ output voltage contains less high frequency content than produced by a return to zero (RZ) SIN DAC, and the only significant phase noise which results from phase jitter occurs during data transitions.